Cyanii develops
PSpice Models for
- PWM Controllers
- IGBTs
- Power MOSFETs
- Darlington Transistors
- OptoCouplers, Photodiodes, Laser Diodes,LEDs
- JFETs
- Power Bipolar Transistors
- OpAmps
- Zener Diodes
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Tools used
- PSpice Model Editor
- PSpice AD
- PSpice Optimizer
- Orcad Capture CIS
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B. VHDL/Verilog based
Modelling
Cyanii has a team of
engineers proficient in VHDL and Verilog and can
develop models to customers specification.
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C. Design Verification Services
Cyanii develops
Orcad-Capture compatible FPGA libraries that can
be simulated on Cadence NC-SIM. Testing for
logic synthesis, place & route on the target
FPGA vendor tool and also functional/timing
simulation is carried out during this design
verification task.
The deliverables include
the self-checking test benches coded in VHDL and
also the netlists generated at different levels
of the design verification process. Cyanii
has completed various FPGA libraries from
vendors like Xilinx and Altera. The services
offered in the design verification domain
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Design
Verification Services
- Synthesizable RTL coding in Verilog/VHDL
- Logic Synthesis and Timing Analysis
- Self-checking testbench for design
verification
- Place and Route
- RTL and Gate Level Design simulation and
Verification with Cadence NC-SIM
- Library Development
- VHDL/Verilog Modeling
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Tools used
- Cadence NC-SIM
- Altera MaxPlus II
- Synplify
- Active_VHDL
- Xilinx Foundation Series
- Xilinx Alliance Series
- Xilinx Webpack ISE
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